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Influence of thickness and annealing temperature on structural and electrical properties of Te/Si heterojunction |
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PP: 9-23 |
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Author(s) |
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Mahdi Hasan Suhail,
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Abstract |
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| Abstract
Heterojunctions are fabricated by depositing tellurium films on n-type single (n-Si) wafers by the method of vacuum evaporation.Te thin films were prepared on glass substrate to study the X-ray diffraction.The X-Ray Diffraction and measurement of the electrical properties of the Te films at room temperature with rate of deposition equal to 80 nm/sec for different thicknesses (400-800) nm and different annealing temperatures (373and 423) K were also studies . The A.C conductivity a.c() of Te films with different thicknesses and annealing temperatures has been investigated as a function of frequency and temperatures. The type of charge carriers, carrier concentration (nH) and Hall mobility (H) have been estimated from Hall measurements. The current –voltage and capacitance–voltage measurements in the dark as well as illumination was done for Te thin films. We can observe that the depletion layer width (W) increases with increasing of the annealing temperature which is due to the decreasing in the carrier concentration which leads to a decrease of the capacitance. The variation of built-in potential (Vbi) may be due to the improvement in the structure of the film. The ideality factor and tunneling constant for Te/Si Heterojunction were also studies as a function of thickness and annealing temperatures.
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